Publications
S. Chowdhury, N. A. Aadit, A. Grimaldi, E. Raimondo, A. Raut, P. A. Lott, J. H. Mentink, M. M. Rams, F. Ricci-Tersenghi, M. Chiappini, L. S. Theogarajan, T. Srimani, G. Finocchio, M. Mohseni, and K. Y. Camsari, Nature Communications, 2025 (to appear).
M.M.H. Sajeeb, N.A. Aadit, S. Chowdhury, T. Wu, C. Smith, D. Chinmay, A. Raut, K.Y. Camsari, C. Delacour, and T. Srimani, Physical Review Applied (PRApplied), 2025
M.S. Sajal, T. Wu, M. Dandin, and T. Srimani, IEEE Electron Device Letters (EDL), 2025.
A.C. Yu, T. Srimani, and M. Shulaker, ACS Applied Materials and Interfaces (ACS AMI), 2025.
S. Choi, C. Gilardi, P. Gutwin, R.M. Radway, T. Srimani, and S. Mitra, IEEE Transactions on Electron Devices, 2025.
D. Rich, T. Srimani, M. Malakoutian, S. Chowdhury, S. Mitra, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2024.
C. Gilardi, G. Zeevi, S. Choi, S. Su, T. Hung, S. Li, N. Safron, Q. Lin, T. Srimani, M. Passlack, G. Pitner, E. Chen, I. Radu, H. P. Wong, S. Mitra, IEEE International Electron Devices Meeting (IEDM), December 2023.
T. Srimani, A. Bechdolt, S. Choi, C. Gilardi, A. Kasperovich, S. Li, Q. Lin, M. Malakoutian, P. McEwen, R. M. Radway, D. Rich, A. C. Yu, S. Fuller, S. Achour, S. Chowdhury, H.-S. P. Wong, M. Shulaker, S. Mitra, IEEE International Electron Devices Meeting (IEDM), December 2023.
T. Srimani, A.C. Yu, R. Radway, D. Rich, M. Nelson, S. Wong, D. Murphy, S. Fuller, G. Hills, S. Mitra, M. Shulaker, IEEE Symp. VLSI Technology, June 2023 (Technology Focus Session & Best Paper).
T. Srimani, R. Radway, K. Prabhu, J. Kim, et al., 2023 ACM/IEEE Design Automation & Test in Europe Conference & Exhibition (DATE).
T. Srimani, A.C. Yu, J. Ding, et al., Advanced Electronic Materials, 2022.
T. Srimani, A.C. Yu, and M. Shulaker, IEEE VLSI-TSA, 2022, pp. 1-2.
A.C. Yu, T. Srimani, IEEE EDL, 2022, 43(3), pp. 486-489.
T. Srimani, G. Hills, M. Bishop, C. Lau, et al., IEEE Symp. on VLSI Technology and Circuits, 2020, pp. 1-2.
C. Lau, G. Hills, M. D. Bishop, T. Srimani, R. Ho, P. Kanhaiya, A. Yu, A. Amer, M. Chao, M. M. Shulaker, IEEE VLSI-TSA, 2020, pp. 134-135.
G. Hills, C. Lau, T. Srimani, M.D. Bishop, P. Kanhaiya, R. Ho, A. Amer, M. M. Shulaker, ISPD, 2020, pp. 33-38.
M. D. Bishop, G. Hills, T. Srimani, C. Lau, et al., Nature Electronics, 2020, 3(8), pp. 492-501.
G. Hills, C. Lau, A. Wright, S. Fuller, M. D. Bishop, T. Srimani, P. Kanhaiya, et al., Nature, 2019, 572(7771), pp. 595-602.
T. Srimani, G. Hills, C. Lau, M. Shulaker, IEEE Symp. on VLSI Tech., 2019, pp. T24-T25.
T. Srimani, G. Hills, X. Zhao, D. Antoniadis, J. A. del Alamo, M. M. Shulaker, APL, 2019, 115(6), pp. 063107.
T. Srimani, G. Hills, M. D. Bishop, M.M. Shulaker, IEEE TNANO, 2018, 18, pp. 132-138.
C. Lau, G. Hills, M. D. Bishop, T. Srimani, A. Yu, M. M. Shulaker, ACS Nano, 2018, 12(11), pp. 10924-10931.
T. Srimani, G. Hills, M.D. Bishop, IEEE EDL, 2017, 39(2), pp. 304-307.
T. Srimani, B. Manna, A.K. Mukhopadhyay, K. Roy, M. Sharad, In 2016 IEEE DRC, pp. 1-2.
Presentations
Towards Multi-Chip Distributed Accelerators for Probabilistic Algorithms
T. Srimani, Department of Electrical Engineering, Indian Institute of Technology, Bombay, India (Aug 2025).
Ultra-dense 3D Heterogeneous Integration of Logic and Memory and their Lab-to-Fab
T. Srimani, IEEE International Conference on Nanotechnology (IEEE-NANO) (July 2025).
NanoSystems: Lab-to-fab
T. Srimani, Semiconductors: Opportunities and Challenges, INL, Braga Portugal (Mar 2025).
The next leap in computing systems: powered by beyond-silicon technologies and their lab-to-fab
T. Srimani, ECE Graduate Seminar Series, 麻豆村 (Sep 2024).
Next-generation Probabilistic Computing Hardware with 3D MOSAICs, Illusion Scale-up, and Co-design
T. Srimani, DOE ASCR Analog Computing for Science Workshop, Bethesda, Maryland (Sep 2024).
NanoSystems: Lab-to-fab and Co-design
T. Srimani, Department of Electrical Engineering, Indian Institute of Technology, Bombay, India (Aug 2024).
The next leap in computing systems: powered by beyond-silicon technologies and their lab-to-fab
T. Srimani, Centre for Nano Science and Engineering, Indian Institute of Science, Bangalore, India (Aug 2024).
Foundry Monolithic 3D Logic+Memory Stack unlocks Large IC Architectural Benefits
T. Srimani, 3D Integration Workshop, IEEE DATE Conference (Mar 2024).
New Foundry Monolithic 3D Transistor+Memory Unlocks Large Benefits vs. Conventional Silicon Transistor+Memory within the Same Footprint
T. Srimani, R.M. Radway, SystemX Fall Conference, Stanford University (Nov 2023).
New Foundry Monolithic 3D BEOL Transistor+Memory Stack Unlocks Large IC Architectural Benefits Within the Same Design Footprint at the Same Technology Node
T. Srimani, IEEE/ACM ICCAD SLIP Workshop, San Francisco, USA (Nov 2023).
NanoSystems: Lab to Fab
T. Srimani, IEEE IISc Bangalore, Bangalore, India (Jul 2023).
NanoSystems: Lab to Fab
T. Srimani, IEEE Leuven/MICAS, KU Leuven (Apr 2023).
Talk is Cheap: It Takes Money to Ride the Train
T. Srimani, M. Shulaker, 6.nano seminar series, EECS, MIT (Nov 2022).
Foundry Monolithic 3D Technology Enables New Architectural Design Points with Large Benefits
T. Srimani, R.M. Radway, SystemX Fall Conference, Stanford University (Nov 2022).
NanoSystems: Lab to Fab
T. Srimani, ECE Graduate Seminar Series, 麻豆村 (Nov 2022).
The Future of Hardware Technologies for Computing: N3XT 3D MOSAIC, Illusion Scaleup, Co-Design
T. Srimani, R.M. Radway, H.-S.P. Wong, S. Mitra, TCVLSI newsletter (May 2022).
Nanosystems for Energy-Efficient Computing using Carbon Nanotube FETs and Monolithic 3D Integration
T. Srimani, 3D Integration Workshop, IEEE DATE Conference (Mar 2022).
Commercial Opportunities for RRAM, CNTs, and Monolithic 3D in the US
T. Srimani, CICS Meeting, MTL, MIT (Nov 2021).
Beyond-Silicon Technologies for Beyond-Silicon Applications
T. Srimani, CICS Meeting, MTL, MIT (May 2021).
Establishing Emerging Nanotechnologies to Supplement Silicon CMOS within Commercial Fabs and Foundries
T. Srimani, CICS Meeting, MTL, MIT (May 2020).
Back Gate Transistors for Highly Scaled and Energy Efficient Digital Electronics
T. Srimani, Best Poster, Masterworks, EECS, MIT (Apr 2018).
Energy-efficient Digital VLSI using Carbon Nanotube Transistors
T. Srimani, Department of E&ECE, Indian Institute of Technology, Kharagpur, India (Mar 2018).
Back Gate Transistors for Highly Scaled and Energy Efficient Digital Electronics
T. Srimani, MTL Annual Research Conference, MIT (Feb 2018).
Beyond silicon technologies and heterogeneous integration
T. Srimani, Guest Lecture, 6.374, Analysis and Design of Digital Integrated Circuits, MIT (Nov 2017).
Electronics and optoelectronics of a novel transition metal dichalcogenide
T. Srimani, L. Chen, Y. Ma, C. Zhou, Poster, Indian National Science Academy, Delhi (Aug 2015).
Patents
M. Shulaker, T. Srimani, S. Fuller, Y. Stein, D. Murphy, U.S. Patent 11626486, issued April 11, 2023.